PC8564A-1(2010) データシートの表示（PDF） - NXP Semiconductors.
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PC8564A-1 Datasheet PDF : 45 Pages
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NXP Semiconductors
PCF8564A
Real time clock and calendar
8.6.2 Register Hour_alarm
Table 19. Hour_alarm - hour alarm register (address 0Ah) bit description
Bit Symbol
Value Place value Description
7
AE_H
0
-
hour alarm is enabled
1[1]
-
hour alarm is disabled
6
-
-
-
unused
5 to 4 HOUR_ALARM
3 to 0
0 to 2
0 to 9
ten’s place hour alarm information coded in BCD
unit place format
[1] Default value.
8.6.3 Register Day_alarm
Table 20. Day_alarm - day alarm register (address 0Bh) bit description
Bit Symbol
Value Place value Description
7
AE_D
0
-
day alarm is enabled
1[1]
-
day alarm is disabled
6
-
-
-
unused
5 to 4 DAY_ALARM
3 to 0
0 to 3
0 to 9
ten’s place day alarm information coded in BCD
unit place format
[1] Default value.
8.6.4 Register Weekday_alarm
Table 21. Weekday_alarm - weekday alarm register (address 0Ch) bit description
Bit Symbol
Value
Description
7
AE_W
0
weekday alarm is enabled
1[1]
weekday alarm is disabled
6 to 3 -
-
unused
2 to 0 WEEKDAY_ALARM 0 to 6
weekday alarm information coded in BCD format
[1] Default value.
8.6.5 Alarm flag
By clearing the MSB of one or more of the alarm registers AE_x (Alarm Enable), the
corresponding alarm condition(s) are active. When an alarm occurs, AF is set to logic 1.
The asserted AF can be used to generate an interrupt (INT). The AF is cleared using the
interface.
The registers at addresses 09h through 0Ch contain alarm information. When one or
more of these registers is loaded with a valid minute, hour, day or weekday and its
corresponding Alarm Enable bit (AE_x) is logic 0, then that information is compared with
the current minute, hour, day and weekday. When all enabled comparisons first match, the
Alarm Flag (AF in register Control_2) is set to logic 1.
PCF8564A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 30 September 2010
© NXP B.V. 2010. All rights reserved.
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