PC8576C-1 データシートの表示（PDF） - NXP Semiconductors.

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PC8576C-1

Universal LCD driver for low multiplex rates

NXP Semiconductors. 

NXP Semiconductors

PCF8576C

Universal LCD driver for low multiplex rates

The display RAM bit map Figure 13 shows the rows 0 to 3 which correspond with the

backplane outputs BP0 to BP3, and the columns 0 to 39 which correspond with the

segment outputs S0 to S39. In multiplexed LCD applications the segment data of the first,

second, third and fourth row of the display RAM are time-multiplexed with BP0, BP1, BP2,

and BP3 respectively.

display RAM addresses (columns)/segment outputs (S)

01234

35 36 37 38 39

0

display RAM bits

(rows)/

1

backplane outputs

(BP)

2

3

mbe525

The display RAM bitmap shows the direct relationship between the display RAM column and the

segment outputs; and between the bits in a RAM row and the backplane outputs.

Fig 13. Display RAM bit map

When display data is transmitted to the PCF8576C, the display bytes received are stored

in the display RAM in accordance with the selected LCD drive mode. The data is stored as

it arrives and does not wait for an acknowledge cycle as with the commands. Depending

on the current multiplex drive mode, data is stored singularly, in pairs, triples or

quadruples. To illustrate the filling order, an example of a 7-segment numeric display

showing all drive modes is given in Figure 14; the RAM filling organization depicted

applies equally to other LCD types.

PCF8576C

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 10 — 22 July 2010

© NXP B.V. 2010. All rights reserved.

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