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MAX155AEWI(2012) データシートの表示(PDF) - Maxim Integrated

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MAX155AEWI
(Rev.:2012)
MaximIC
Maxim Integrated MaximIC
MAX155AEWI Datasheet PDF : 20 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
MAX155/MAX156
8-/4-Channel ADCs with Simultaneous
T/Hs and Reference
CS
WR
RD
BUSY
D0-D7
tCONV
DATA IN
CH0
CH1
CH2
CH3
UPDATE CONFIGURATION
REGISTER AND BEGIN NEW
CONVERSION
ALL 8 CHANNELS ARE SAMPLED HERE
CONVERSION END
OF ALL 8 CHANNELS
THE FIRST RAM
LOCATION READ
IS CH 0
CONSECUTIVE RAM LOCATIONS ARE
ACCESSED BY CONSECUTIVE RD PULSES
NOTE: After power-up, and prior to the above
timing sequence, all single-ended channels must
be set up by writing the following data into the
configuration register. 8 WRs (see Figure 3) are
needed for 8 channels:
A0 A1 A2
000
100
010
110
001
101
011
111
PD INH BIP DIFF ALL
01S 0 0
01S 0 0
01S 0 0
01S 0 0
01S 0 0
01S 0 0
01S 0 0
01S 0 0
S = May be selected
Once the above data is loaded, all channels are
converted with a single WR to any address
(this is where the above timing diagram begins).
With INH = 0, and ALL = 0:
A0 A1 A2 PD INH BIP DIFF ALL
000 00S 0 0
Figure 4a. Input/Output Mode Timing–Eight Single-Ended Conversions
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