MAX156BCWI(2012) データシートの表示（PDF） - Maxim Integrated
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MAX156BCWI Datasheet PDF : 20 Pages
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MAX155/MAX156
8-/4-Channel ADCs with Simultaneous
T/Hs and Reference
Pin Description
MAX155
PDIP/SO
1
PIN
MAX156
PDIP
SO
23
26
2
24
28
3
1
2
4
2
4
5
3
5
6
4
6
7
5
7
8
6
8
9
7
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25–28
—
8
10
9
11
10
12
11
13
12
14
13
15
14
16
15
17
16
18
17
19
18
20
19
21
20
22
21
23
22
24
—
—
—
1, 3,
25, 27
NAME
FUNCTION
AIN3
AIN2
AIN1
AIN0
MODE
VSS
CS
RD
WR
BUSY
CLK
D7/ALL
D6/DIFF
DGND
D5/BIP
D4/INH
D3/PD
D2/A2
D1/A1
D0/A0
REFOUT
REFIN
AGND
VDD
AIN7–4
Sampling Analog Input, Channel 3
Sampling Analog Input, Channel 2
Sampling Analog Input, Channel 1
Sampling Analog Input, Channel 0
Mode configures multiplexer and converter. See Table 4.
Negative Supply. Power VSS with -5V for extended input range.
CHIP SELECT Input must be low for the ADC to recognize RD, or WR
READ Input reads data sequentially from RAM
WRITE Input’s rising edge initiates conversion and updates channel configuration
register. Falling edge samples inputs.
BUSY Output low when conversion is in progress
External Clock Input
Three-State Data Output Bit 7 (MSB)/Sequential or Specific Conversion
Three-State Data Output Bit 6/Single-Ended/Differential Select
Digital Ground
Three-State Data Output Bit 5/Unipolar/Bipolar Conversion
Three-State Data Output Bit 4/Inhibit Conversion Input
Three-State Data Output Bit 3/Power-Down Input
Three-State Data Output Bit 2/RAM Address Bit A2 (MAX155 Only)
Three-State Data Output Bit 1/RAM Address Bit A1
Three-State Data Output Bit 0/RAM Address Bit A0
Reference Output, +2.5V
Reference Input, +2.5 Normally
Analog Ground
Power-Supply Voltage, +5V Normally
Sampling Analog Input, Channels 7–4
N.C. No Connection. No internal connection—pin unconnected.
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