PM3386-BI データシートの表示（PDF） - PMC-Sierra

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PM3386-BI

DUAL GIGABIT ETHERNET CONTROLLER

PMC-Sierra 

RELEASED

DATASHEET

PMC-1991129

ISSUE 7

PM3386

DUAL GIGABIT ETHERNET CONTROLLER

Table 52 - GMII Receive Interface Timing

Symbol

Fref

Fdev

Dcref

tSRXD

tHRXD

tSRX_ER

tHRX_ER

tSRX_DV

tHRX_DV

Description

RX_CLK Frequency

Frequency Deviation from Nominal

RX_CLK Duty Cycle

RXD[7:0] set-up time to RX_CLK

RXD[7:0] hold time to RX_CLK

RX_ER set-up time to RX_CLK

RX_ER hold time to RX_CLK

RX_DV set-up time to RX_CLK

RX_DV hold time to RX_CLK

Min

125

- 100

40

2

.25

2

.25

2

.25

Figure 35 GMII Receive Physical Timing

Max

125

+ 100

60

Units

MHz

ppm

%

ns

ns

ns

ns

ns

ns

RX_CLK

RXD[7:0]

RX_ER

RX_DV

tSRX D

tSRX _ER

tSRX_DV

tHRXD

tHRX _ER

tHRX_DV

Notes on GMII Receive I/O Timing:

Note 1:

Note 2:

When a set-up time is specified between an input and a clock, the set-up

time is the time in nanoseconds from the 1.4 Volt point of the input to the

1.4 Volt point of the clock.

When a hold time is specified between an input and a clock, the hold time

is the time in nanoseconds from the 1.4 Volt point of the clock to the 1.4

Volt point of the input.

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

300

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