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AT49F8192-12RC データシートの表示(PDF) - Atmel Corporation

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AT49F8192-12RC Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
AC Read Characteristics
Symbol
tACC
tCE (1)
tOE (2)
tDF (3, 4)
tOH
Parameter
Address to Output Delay
CE to Output Delay
OE to Output Delay
CE or OE to Output Float
Output Hold from OE, CE or Address, whichever occurred first
AC Read Waveforms (1)(2)(3)(4)
AT49F8192-90
Min Max
90
90
0
40
0
25
0
AT49F8192-12
Min Max
120
120
0
50
0
30
0
Units
ns
ns
ns
ns
ns
Notes:
1. CE may be delayed up to tACC - tCE after the address
transition without impact on tACC.
2. OE may be delayed up to tCE - tOE after falling edge
of CE without impact on tCE or by tACC - tOE after an
address change without impact in tACC.
Input Test Waveforms and
Measurement Level
3. tDF is specified from OE or CE whichever occurs first
(CL = 5 pF).
4. This parameter is characterized and is not 100%
tested.
Output Test Load
tR, tF < 5 ns
Pin Capacitance (f = 1 MHz, T = 25°C)(1)
Typ
Max
CIN
COUT
Note:
4
6
8
12
1. This parameter is characterized and is not 100% tested.
6 AT49F8192/8192T
Units
pF
pF
Conditions
VIN = 0V
VOUT = 0V

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