PSD4256G6V データシートの表示（PDF） - STMicroelectronics
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PSD4256G6V Datasheet PDF : 100 Pages
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PSD4256G6V
Table 13. Input Macrocells - Ports A, B, and C
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
IMcell 7
IMcell 6
IMcell 5
IMcell 4
IMcell 3
Note: Bit Definitions (Read only registers):
READ Input Macrocell (IMC7-IMC0) status on Ports A, B, and C.
Bit 2
IMcell 2
Bit 1
IMcell 1
Bit 0
IMcell 0
Table 14. Output Macrocells A Register
Bit 7
Bit 6
Bit 5
Bit 4
Mcella 7
Mcella 6
Mcella 5
Mcella 4
Note: Bit Definitions:
WRITE Register: Load MCellA7-MCellA0 with ’0’ or ’1.’
READ Register: Read MCellA7-MCellA0 output status.
Bit 3
Mcella 3
Bit 2
Mcella 2
Bit 1
Mcella 1
Bit 0
Mcella 0
Table 15. Out Macrocells B Register
Bit 7
Bit 6
Bit 5
Bit 4
Mcellb 7
Mcellb 6
Mcellb 5
Mcellb 4
Note: Bit Definitions:
WRITE Register: Load MCellB7-MCellB0 with ’0’ or ’1.’
READ Register: Read MCellB7-MCellB0 output status.
Bit 3
Mcellb 3
Bit 2
Mcellb 2
Bit 1
Mcellb 1
Bit 0
Mcellb 0
Table 16. Mask Macrocells A Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Mcella 7
Mcella 6
Mcella 5
Mcella 4
Mcella 3
Note: Bit Definitions:
McellA<i>_Prot 0 = Allow MCellA<i> flip-flop to be loaded by MCU (default).
McellA<i>_Prot 1 = Prevent MCellA<i> flip-flop from being loaded by MCU.
Bit 2
Mcella 2
Bit 1
Mcella 1
Bit 0
Mcella 0
Table 17. Mask Macrocells B Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Mcellb 7
Mcellb 6
Mcellb 5
Mcellb 4
Mcellb 3
Note: Bit Definitions:
McellB<i>_Prot 0 = Allow MCellB<i> flip-flop to be loaded by MCU (default).
McellB<i>_Prot 1 = Prevent MCellB<i> flip-flop from being loaded by MCU.
Bit 2
Mcellb 2
Bit 1
Mcellb 1
Bit 0
Mcellb 0
Table 18. Flash Memory Protection Register 1
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Sec7_Prot Sec6_Prot Sec5_Prot Sec4_Prot Sec3_Prot
Note: Bit Definitions (Read only register):
Sec<i>_Prot 1 = Primary Flash memory Sector <i> is write protected.
Sec<i>_Prot 0 = Primary Flash memory Sector <i> is not write protected.
Bit 2
Sec2_Prot
Bit 1
Sec1_Prot
Bit 0
Sec0_Prot
Table 19. Flash Memory Protections Register 2
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Sec15_Prot Sec14_Prot Sec13_Prot Sec12_Prot Sec11_Prot
Note: Bit Definitions (Read only register):
Sec<i>_Prot 1 = Primary Flash memory Sector <i> is write protected.
Sec<i>_Prot 0 = Primary Flash memory Sector <i> is not write protected.
Sec10_Prot
Sec9_Prot
Bit 0
Sec8_Prot
21/100
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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