ADSP-21MOD980N-000 データシートの表示（PDF） - Analog Devices
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ADSP-21MOD980N-000 Datasheet PDF : 42 Pages
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PRELIMINARY TECHNICAL DATA
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ELECTRICAL CHARACTERISTICS (CONTINUED)
ADSP-21mod980N
Parameter
Test Conditions
Min
Typ
Max Unit
IDD, Supply Current (Idle)
@ VDDINT = 1.9V
tCK = 12.5 ns
50
mA
IDD, Supply Current (Dynamic)
IDD, Supply Current (Powerdown)10
@ VDDINT = 1.9V
tCK = 12.5 ns9
TAMB = +25°C
Lowest power mode
200
mA
800
µA
CI, Input Pin Capacitance
RESET, BR, IS, TFS0, PF[7:4]
@ VIN = 2.5 V, fIN = 1.0 MHz,
TAMB = +25°C
8
pF
CI, Input Pin Capacitance
IWR, IRD, IAL, DR0, RFS0, SCLK0, IAD [15:0]
@ VIN = 2.5 V, fIN = 1.0 MHz,
TAMB = +25°C
32 pF
CI, Input Pin Capacitance
TFS1, PF[2:0], CLKIN, DR1, RFS1, SCLK1
@ VIN = 2.5 V, fIN = 1.0 MHz,
TAMB = +25°C
64 pF
CO, Output Pin Capacitance1, 6, 7, 10, 11
BG, CLKOUT, TFS0, PF[7:4], DT1
@ VIN = 2.5 V, fIN = 1.0 MHz,
TAMB= +25°C
8
pF
CO, Output Pin Capacitance1, 6, 7, 9, 10
IAD [15:0], DT0, IACK, RFS0, SCLK0
@ VIN = 2.5 V, fIN = 1.0 MHz,
TAMB= +25°C
32 pF
CO, Output Pin Capacitance1, 6, 7, 9, 10
SCLK1, TFS1, PF[2:0], DATA [23:8], A0, RFS1
@ VIN = 2.5 V, fIN = 1.0 MHz,
TAMB= +25°C
64 pF
1 Bidirectional pins: RFS0, RFS1, SCLK0, SCLK1, TFS0, TFS1, IAD [15:0], PF[2:0], PF[7:4].
2 Input only pins: RESET, BR, DR0, DR1, IS, IAL,IRD, IWR.
3 Input only pins: CLKIN, RESET, BR, DR0, DR1.
4 Output pins: BG, A0, DT0, DT1, CLKOUT, IACK.
5 Although specified for TTL outputs, all ADSP-21mod980N outputs are CMOS-compatible and will drive to VDDEXT and GND, assuming no DC
loads.
6 Guaranteed but not tested.
7 Three-statable pins: DT0, DT1, SCLK0, SCLK1, TFS0, TFS1, RFS0, RSF1, IAD[15:0].
8 0 Volts on BR.
9 Vin = 0V and 3V. For typical supply current figures refer to “Power Dissipation” section.
10 See the ADSP-2100 Family User’s Manual for details.
11 Output pin capacitance is the capacitive load for any three-stated output pin
REV. PrB 6/2001
19
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