RF3159 データシートの表示（PDF） - RF Micro Devices
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RF3159 Datasheet PDF : 26 Pages
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RF3159
Since the RF3159 operates as a gain block in EDGE mode, gain variation over extreme conditions must be considered when
determining the output power that a specific input power will produce. Special attention must be given to ensure that the out-
put power of the PA does not go higher than the maximum linear output that the PA can provide with acceptable EVM and ACPR
performance.
A large portion of the total current in a linear amplifier is necessary to bias the transistors so that the output remains linear. In
an EDGE system where there are a range of output power levels used (PCLs), an amplifier biased to operate at a high power
will be very inefficient at low power levels. Conversely, an amplifier biased to operate at a low power will not be linear at high
power levels. The maximum linear power of an amplifier is determined during design, but can be adjusted to some extent by
the quiescent current through the amplifier transistors.
The RF3159 incorporates a digital bias control in EDGE mode. This allows the system designer to select a reduced quiescent
current in the power amplifier when operating at lower output power levels, resulting in improved efficiency. Low bias mode for
the RF3159 is selected by a low on the VBIAS pin. In low bias mode the PA can only be operated at or below a specified output
power level while maintaining linearity.
Power Ramping and Timing
The RF3159 should be powered on according to the Power-On Sequence provided in the datasheet. The power on sequence is
designed to prevent operation of the amplifier under conditions that could cause damage to the device or erratic operation.
In the Power-On Sequence, there are some set-up times associated with the control signals of the RF3159. The most important
of these is the settling time between TXEN going high and when VRAMP can begin to increase. This time is often referred to as
the “pedestal” and is required so that the internal power control loop and bias circuitry can settle after being turned on. The
RF3159 requires at least 1.5µs or two quarter bit times for proper settling of the power control loop.
The diagram below is the ETSI time mask for a single GSM timeslot.
The VRAMP waveform used with the RF3159 must be created such that the output power falls into this power versus time mask.
The ability to ramp the RF output power to meet ETSI switching transient and time mask requirements partially depends upon
the predictability of output power versus VRAMP response of the power amplifier. The PowerStar® control in the RF3159 is very
capable of meeting switching transient requirements with the proper raised cosine waveform applied to the VRAMP input. The
ramping waveform on VRAMP must not start until after TX_EN is asserted. A ramp of about 12us is required to control switching
transients at high power levels.
Rev A0 DS070102
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
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