AD8401 データシートの表示（PDF） - Analog Devices
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AD8401 Datasheet PDF : 12 Pages
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AD8401
TIMING ELECTRICAL SPECIFICATIONS (@ VDD = +5.0 V ؎ 5%, AGDAC = AGADC = 0.0 V; fCLK = 5 MHz; –40؇C ≤ TA ≤ +85؇C,
unless otherwise noted)
Parameters1, 2, 3
Symbol
Condition Min Typ
Max Units
DAC TIMING (See Figure 8 Timing Diagram)
WR Pulse Width
t1
CS to WR Setup Time
t2
CS to WR Hold Time
t3
Data Setup Time
t4
Data Hold Time
t5
50
ns
0
ns
0
ns
60
ns
0
ns
ADC TIMING (See Figures 6 and 7 Timing Diagrams)
ST Pulse Width
t6
ST to BUSY Delay
t7
BUSY to INT Delay
t8
BUSY to CS Delay
t9
CS to RD Setup Time
t10
RD Pulse Width4
t11
CS to RD Hold Time
t12
Data Access after RD
t13
Data Access after RD
t13
Bus Relinquish after RD
t14
RD to INT Delay
t15
RD to BUSY Delay
t16
Data Valid after BUSY
t17
Data Valid after BUSY
t17
40
0
0
75
0
CL = 20 pF 10
CL = 100 pF 10
10
CL = 20 pF
CL = 100 pF
ns
110 ns
30 ns
ns
ns
ns
ns
75 ns
135 ns
70 ns
85 ns
110 ns
90 ns
135 ns
NOTES
1All input control signals are specified with tR = tF = 5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V.
2t13 and t17 are measured with the load circuits of Figure 1 and defined as the time required for an output to cross either 0.8 V or 2.4 V.
3t14 is defined as the time required for the data line to change 0.5 V when loaded with the circuit of Figure 2.
4t15 is determined by t13.
+5V
+5V
DBN
3kΩ
3kΩ
DBN
CL
CL
DBN
3kΩ
10pF
DBN
3kΩ
10pF
DGND
DGND
a. High Z to VOH b. High Z to VOL
Figure 1. Load Circuits for Data Access Time Test
DGND
DGND
a. VOH to High Z
b. VOL to High Z
Figure 2. Load Circuits for Bus Relinquish Time Test
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage (VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . +8 V
Input Voltages . . . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Package Power Dissipation . . . . . . . . . . . . . . (TJ max–TA)/θJA
Thermal Resistance θJA
28-Lead SOIC (R) . . . . . . . . . . . . . . . . . . . . . . . . . 53°C/W
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C
Junction Temperature Range (TJ max) . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . +300°C
ORDERING GUIDE
Model*
Temperature Package
Package
Range
Description Option
AD8401AR –40°C to +85°C 28-Lead SOIC SOL-28
AD8401Chips +25°C
Die
*The AD8401 contains 1257 transistors.
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8401 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4–
REV. 0
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