RT9602 データシートの表示（PDF） - Richtek Technology
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RT9602 Datasheet PDF : 11 Pages
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RT9602
When layout the PCB, it should be very careful. The power-
circuit section is the most critical one. If not configured
properly, it will generate a large amount of EMI. The junction
of Q1, Q2, L2 and Q3, Q4, L4 should be very close. The
connection from Q1, and Q3 drain to positive sides of C1,
C2, C3, and C4; the connection from Q2, and Q4 source
to the negative sides of C1, C2, C3, and C4 should be as
short as possible.
Next, the trace from Ugate1, Ugate2, Lgate1, and Lgate2
should also be short to decrease the noise of the driver
output signals. Phase1 and phase2 signals from the
junction of the power MOSFET, carrying the large gate
drive current pulses, should be as heavy as the gate drive
trace. The bypass capacitor C7 should be connected to
PGND directly. Furthermore, the bootstrap capacitors (Cb1,
Cb2) should always be placed as close to the pins of the IC
as possible.
Select the Bootstrap Capacitor
Figure 3. shows part of the bootstrap circuit of RT9602.
The VCB (the voltage difference between BOOT1 and
PHASE1 on RT9602) provides a voltage to the gate of the
high side power MOSFET. This supply needs to be ensured
that the MOSFET can be driven. For this, the capacitance
CB has to be selected properly. It is determined by following
constraints.
PVCC
VIN
BOOT1
UGATE1
CB
PHASE1
PVCC
+
VCB
-
LGATE1
PGND
Figure 3. Part of Bootstrap Circuit of RT9602
In practice, a low value capacitor CB will lead the
overcharging that could damage the IC. Therefore to
minimize the risk of overcharging and reducing the ripple
on VCB, the bootstrap capacitor should not be smaller than
0.1μF, and the larger the better. In general design, using
1μF can provide better performance. At least one low-ESR
capacitor should be used to provide good local de-coupling.
Here, to adopt either a ceramic or tantalum capacitor is
suitable.
Power Dissipation
For not exceeding the maximum allowable power
dissipation to drive the IC beyond the maximum
recommended operating junction temperature of 125°C, it
is necessary to calculate power dissipation appropriately.
This dissipation is a function of switching frequency and
total gate charge of the selected MOSFET. Figure 4. shows
the power dissipation test circuit. CL and CU are the UGATE
and LGATE load capacitors, respectively. The bootstrap
capacitor value is 0.01μF.
+5V or +12V
0.01uF
+5V or +12V
1uF
+12V
1uF
PWM1
PWM2
PGND
GND
UGATE1
PHASE1
LGATE1
CL
RT9602 0.01uF
2N7000
CU
2N7000 33
UGATE2
PHASE2
LGATE2
CL
2N7000
CU
2N7000 33
Figure 4. RT9602 Power Dissipation Test Circuit
Figure 5. shows the power dissipation of the RT9602 as a
function of frequency and load capacitance. The value of
the CU and CL are the same and the frequency is varied
from 100kHz to 600kHz. PVCC and VCC is 12V and
connected together. Figure 6.shows the same
characterization for PVCC tied to 5V instead of 12V.
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DS9602-08 March 2007
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