XC2264 データシートの表示（PDF） - Infineon Technologies

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XC2264

16/32-Bit Single-Chip Microcontroller with 32-Bit Performance

Infineon Technologies 

XC2267 / XC2264

XC2000 Family Derivatives

Preliminary

Functional Description

Table 4

XC226x Interrupt Nodes (cont’d)

Source of Interrupt or PEC

Service Request

Control

Register

Vector

Location1)

Trap

Number

USIC2 Request 3

U2C1_0IC

xx’017CH

5FH / 95D

USIC2 Request 4

U2C1_1IC

xx’0180H

60H / 96D

USIC2 Request 5

U2C1_2IC

xx’0184H

61H / 97D

Unassigned node

–

xx’0188H

62H / 98D

Unassigned node

–

xx’018CH

63H / 99D

Unassigned node

–

xx’0190H

64H / 100D

Unassigned node

–

xx’0194H

65H / 101D

Unassigned node

–

xx’0198H

66H / 102D

Unassigned node

–

xx’019CH

67H / 103D

Unassigned node

–

xx’01A0H

68H / 104D

Unassigned node

–

xx’01A4H

69H / 105D

Unassigned node

–

xx’01A8H

6AH / 106D

SCU Request 1

SCU_1IC

xx’01ACH

6BH / 107D

SCU Request 0

SCU_0IC

xx’01B0H

6CH / 108D

Program Flash Modules

PFM_IC

xx’01B4H

6DH / 109D

RTC

RTC_IC

xx’01B8H

6EH / 110D

End of PEC Subchannel

EOPIC

xx’01BCH

6FH / 111D

1) Register VECSEG defines the segment where the vector table is located to.

Bitfield VECSC in register CPUCON1 defines the distance between two adjacent vectors. This table

represents the default setting, with a distance of 4 (two words) between two vectors.

Data Sheet

39

V0.1, 2007-02

Draft Version

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