SDA5275C-2CS データシートの表示（PDF） - Siemens AG
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SDA5275C-2CS Datasheet PDF : 30 Pages
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SDA 5273 / 75
SDA 5273-2 / 75-2
Characteristics (cont’d)
TA = 0 to 70 °C
Parameter
Symbol Limit Values Unit Test Condition
min. typ. max.
DRAM-Interface (see diagram 5)
The external DRAM is operated in page mode.
The timing of the DRAM-interface signals are specified below.
Cycle time
tWC
Address hold time from RAS tRAH
Address hold time from CAS tCAH
Address set-up time from
tASR
RAS
420 500 550 ns
25
ns
60
ns
5
ns
Address set-up time from
tASC
5
ns
CAS
L-time RAS
tRASP
280
ns
L-time CAS
tCASL
70
ns
H-time RAS
tRP
140
ns
H-time CAS
tCP
70
ns
Refresh period
20
ms
Write Cycle
L-time WE
tWEL
210
Data set-up time to CAS
tDS
100
WE set-up time to CAS
tRCS
0
Data hold time from CAS
tDH
55
Data hold time from WE
tOHZ
Read Cycle
H-time WE (output enable) tOEL
210
Access time from CAS
tCAC
Data hold time of DRAM
tOFF
40
ns
ns
ns
ns
10 ns
ns
60 ns
ns
Semiconductor Group
19
1997-09-01
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