SDA5273C-2CS データシートの表示（PDF） - Siemens AG

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SDA5273C-2CS

ICs for Consumer Electronics MEGATEXT and MEGATEXT PLUS ICs

Siemens AG 

SDA 5273 / 75

SDA 5273-2 / 75-2

Characteristics (cont’d)

TA = 0 to 70 °C

Parameter

Symbol

Limit Values

Unit Test Condition

min. typ. max.

Reset/Chip Initialization

A power-on reset or a reset pulse at pin RES lead to a hardware reset and a software initialization

of registers and internal DRAM. During initialization bus transfers are not allowed.

At / after power-on a reset pulse at pin RES is necessary. RES may return to 0 after the supply

voltage reached its lower limit for chip function (4.7 V). This may be achieved by a capacitor C

between RES and VDD and by a resistor R between RES and VSS. The dimensions of R and C

depend on the worst case rise time of VDD.

Initialization time after power- tINIT

on or falling edge of RES

25 ms VDD greater 4.7 V

If the supply voltage drops below VDD min, the IC has to be reset by pin RES.

Pulse width RES

100

ns

High level at pin RES causes chip reset.

In rare cases, the IC may remain in a permanent reset state after power up, depending on the

applicational context. After power up, the software should check proper operation. In case the

Megatext does not react properly, power supply should be switched off for at least 3 s. After that,

power supply can be switched on again.

Other Items

Horizontal frequency pull-in

range of CVBS-PLL:

Horizontal frequency pull-in

range of display-PLL:

15 15.625 16.2 kHz PAL

20.48 MHz crystal

15.2 15.748 16.3 kHz NTSC

20.48 MHz crystal

15 15.625 16.2 kHz

20.48 MHz crystal

Semiconductor Group

20

1997-09-01

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