83C196KB データシートの表示（PDF） - Intel

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83C196KB

Advanced 16-bit CHMOS microcomputer ROMless

Intel 

AUTOMOTIVE 8XC196KB

Parameter

Resolution

Absolute Error

Full Scale Error

Zero Offset Error

Non-Linearity

Differential Non-Linearity

Channel-to-Channel Matching

Repeatability

Temperature Coefficients

Offset

Full Scale

Differential Non-Linearity

Off Isolation

Feedthrough

VCC Power Supply Rejection

Input Resistance

DC Input Leakage

Sample Time (Prescaler on off)

Input Capacitance

Typical (1)

0 25 g0 5

b0 25 g0 5

15g25

g0 1

g0 25

0 009

0 009

0 009

b60

b60

15 8

3

Minimum

512

9

0

0

lb1

0

b60

1K

0

Maximum

1024

10

g6

g4

a2

g1

5K

3

Units

Level

Bits

LSBs

LSBs

LSBs

LSBs

LSBs

LSBs

LSBs(1)

LSB C(1)

LSB C(1)

LSB C(1)

dB(1 2 4)

dB(1 2)

dB(1 2)

X(1)

mA

States (3)

pF

NOTES

These values are expected for most parts at 25 C but are not tested or guaranteed

An ‘‘LSB’’ as used here has a value of approximately 5 mV (See Automotive Handbook for A D glossary of terms

1 These values are not tested in production and are based on theoretical estimates and or laboratory test

2 DC to 100 KHz

3 One state e 125 ns 16 MHz 333 ns 6 MHz

4 Multiplexer Break-Before-Make Guaranteed

80C196KB FUNCTIONAL DEVIATIONS

The 80C196KB has the following problems

1 The HSI unit has two errata one dealing with res-

olution and the other with first entries into the

FIFO

The HSI resolution is 9 states instead of 8 states

Events on the same line may be lost if they occur

faster than once every 9 state times

There is a mismatch between the 9 state time HSI

resolution and the 8 state time timer This causes

one time value to be unused every 9 timer counts

Events may receive a time-tag one count later

than expected because of this ‘‘skipped’’ time val-

ue

If the first two events into an empty FIFO (not

including the Holding Register) occur in the same

internal phase both are recorded with one time-

tag Otherwise if the second event occurs within

9 states after the first its time-tag is one count

later than the first’s If this is the ‘‘skipped’’ time

value the second event’s time-tag is 2 counts lat-

er than the first’s

If the FIFO and Holding Register are empty the

first event will transfer into the Holding Register

after 8 state times leaving the FIFO empty again

If the second event occurs after this time it will

act as a new first event into an empty FIFO

2 If an A D conversion in progress is aborted by

starting a new A D conversion results of the sec-

ond conversion may be inaccurate

15

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