SP791EB データシートの表示（PDF） - Signal Processing Technologies
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SP791EB Datasheet PDF : 6 Pages
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BOARD LAYOUT
The SP791 Evaluation Board has been
designed to easily and conveniently provide
access to all pins of the SP791 device under test.
Position the board with the silkscreen lettering
upright (also see drawing on the front page of
this manual) and you will see two vertical rows
of eight pins each, which represent the 16 pins of
the SP791 device starting in the top left with
VBATT as pin one. The pin receptacles are raised
female pins which can accommodate easy-
hook connection leads for power and meter
connections, as well as scope probe hooks and
grounds for waveform measurements.
The 16 pin SP791 may be installed in one of 3
locations: U1 for DIP or DIP sockets, U3 for
SOICs or U2 for SOIC sockets. The five input
pins for the SP791 are provided with extra Input
Probe Points for connecting inputs to these pins.
For example pin 11 WDI has nearby pins VOUT
and GND to connect to for evaluation of WDI
timeout. These female receptacle pins can be
jumpered together with easy-hook connectors
or stripped back solid wire leads. In the case of
inputs SWT or PFI, a resistor or capacitor with
leads may be pushed into the female receptacle
pins to make easy connections. Also, mating
male pins (see List of Materials) may be
soldered to the components and inserted into the
receptacle pins.
USING THE EVALUATION BOARD
Connect the SP791 Evaluation Board to the
power supplies for VCC and VBATT (see the
section Power Supply Connections following
the table SP791 Pin Assignments). It is good
practice to not switch power on until power
connections are made to the evaluation board.
Evaluating Pin Functions
Pin 1 - VBATT - Backup-Battery Input.
Connect to external supply, battery or capacitor
and charging circuit.
Pin 2 - VOUT - Output Supply Voltage. This
function is used to provide power supply
switching of either VCC or VBATT to an
external device like a CMOS RAM to ensure a
constant supply for the memory. To evaluate
this function, vary the VCC voltage for a set
VBATT voltage until you simulate the following
conditions: VOUT connects to VCC when VCC
is greater than VBATT and VCC is above the reset
threshold. When VCC falls below VBATT and
VCC is below the reset threshold, VOUT connects
to VBATT. Start with VBATT voltage of about 2.8
to 4.0 V and vary VCC from 0V to 5V to 0V and
observe VOUT. (Note: a 0.1µF bypass capacitor
(C1) is connected from VOUT to GND).
Pin 3 - VCC - Input Supply Voltage - +5V input.
A 0.1µF bypass capacitor (C2) is connected
from VCC to GND.
Pin 4 - GND - Ground reference for all signals.
Pin - 5 - BATT ON - Battery On Output.
Goes high when VOUT switches to VBATT. Goes
low when VOUT switches to VCC. Connect the
base of a PNP through a current-limiting resistor
to BATT ON for VOUT current requirements
greater than 250mA.
Pin 6 - PFO - Power-Fail Output. This is the
output of the power-fail comparator. PFO, goes
low when PFI is less than1.25V. This is an
uncommitted comparator, and has no effect on
any other internal circuitry.
Pin 7 - PFI - Power-Fail Input. This is the
non-inverting input to the power-fail comparator.
When PFI is less than 1.25V, PFO goes low.
Connect PFI to GND or VOUT when not used.
Connect external divider R1 & R2 to Probe Pins
and connect Unregulated Voltage to UNREG
for Power Fail monitoring.
Pin 8 - SWT - Set Watchdog-Timeout Input.
Connect this input to VOUT to select the default
1.6 sec watchdog timeout period. Connect a
capacitor (CSWT ) between the Probe Input Pins
SWT and GND to select another watchdog-
timeout period. Watchdog-timeout period = 2.1
x (capacitor value in nF) ms.
Pin 9 - MR - Manual-Reset Input. This input can
be tied to an external momentary pushbutton
switch, or to a logic gate output. RESET remains
low as long as MR is held Low and for 200ms
after MR returns high. Connect MR to Probe
Pin GND to cause a RESET active low.
SP791EB/04
SP791 Evaluation Board Manual
2
©Copyright 2000 Sipex Corporation
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