SP791EB データシートの表示（PDF） - Signal Processing Technologies

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SP791EB

Evaluation Board Manual

Signal Processing Technologies 

Pin 10 - LOWLINE - LOWLINE Output goes

low when VCC falls to 150mV above the reset

threshold. The output can be used to generate

a NMI (non-maskable interrupt) if the

unregulated supply is inaccessible

Pin 11 - WDI - Watchdog Input. WDI is a three-

level input. If WDI remains either high or low

for longer than the watchdog timeout period,

WDO goes low. WDO remains low until the

next transition at WDI. Leaving WDI

unconnected disables the watchdog function.

WDI connects to an internal voltage divider

between VOUT and GND, which sets it to

1.8V when left unconnected. For a simple check

of watchdog function, connect WDI to either

Probe pins GND or VOUT to cause WDO to go to

a Logic Low and produce pulses at WDPO

every 1.6 seconds. (typically 1.6 seconds unless

an external capacitor is used at the SWT pin).

Pin 12 - CE OUT - Chip-Enable Output. The

Chip-Enable (CE) function CE OUT provides

internal gating of chip enable signals to prevent

erroneous data from corrupting the CMOS RAM

in the event of a power failure. During normal

operation, the CE gate is enabled and all CE

transitions are passed from CE IN to CE OUT.

When Reset is asserted, this path is disabled.

Note that CE OUT goes low (active) only when

CE IN is low and VCC is above the reset thresh-

old. If CE IN is low when reset is asserted, CE

OUT will stay low for 15us or until CE IN goes

high, whichever occurs first.

Pin 13 - CE IN - Chip-Enable Input. The Input

to chip-enable gating circuit. Connect to GND

or VOUT if not used.

Pin 14 - WDO - Watchdog Output. WDO goes

low if WDI remains either high or low longer

than the watchdog timeout period. WDO returns

high on the next transition at WDI. WDO

remains high if WDI is unconnected. WDO is

also high when RESET is asserted.

Pin 15 - RESET - RESET Output goes low

whenever VCC falls below the reset threshold.

RESET will remain low for 200ms after VCC

crosses the reset threshold on power-up.

Pin 16 - WDPO - Watchdog-Pulse Output.

Upon the absence of a transition at WDI,WDPO

will pulse low for 1ms. WDPO precedes WDO

by 70ns.

Note: To accurately measure the extremely small

supply current in Battery Back-up mode, you

need to cut split pads SP1 & SP2 (solder side of

board) severing connections to C1 & C2 which

would have leakage currents in the measurement

range. Also, remove charging circuit components

CBATT and D1 if they are installed.

SP791EB/04

SP791 Evaluation Board Manual

3

©Copyright 2000 Sipex Corporation

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