MCP3201-BI/MS データシートの表示（PDF） - Microchip Technology

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MCP3201-BI/MS

2.7V 12-Bit A/D Converter with SPI Serial Interface

Microchip Technology 

MCP3201

5.0 SERIAL COMMUNICATIONS

Communication with the device is done using a

standard SPI-compatible serial interface. Initiating

communication with the MCP3201 device begins with

the CS going low. If the device was powered up with the

CS pin low, it must be brought high and back low to

initiate communication. The device will begin to sample

the analog input on the first rising edge after CS goes

low. The sample period will end in the falling edge of the

second clock, at which time the device will output a low

null bit. The next 12 clocks will output the result of the

conversion with MSB first, as shown in Figure 5-1. Data

is always output from the device on the falling edge of

the clock. If all 12 data bits have been transmitted and

the device continues to receive clocks while the CS is

held low, the device will output the conversion result

LSB first, as shown in Figure 5-2. If more clocks are

provided to the device while CS is still low (after the

LSB first data has been transmitted), the device will

clock out zeros indefinitely.

tCYC

CS

CLK

TSUCS

TCSH

POWER

DOWN

DOUT

TSAMPLE

HI-Z

tCONV

tDATA**

NULL

BIT

B11

B10

B9

B8

B7

B6

B5

B4

B3

B2

B1 B0*

HI-Z

NULL

BIT

B11

B10

B9

B8

* After completing the data transfer, if further clocks are applied with CS low, the A/D Converter will output LSB first data, followed

by zeros indefinitely. See Figure 5-2 below.

** tDATA: during this time, the bias current and the comparator power down and the reference input becomes a high-impedance

node, leaving the CLK running to clock out the LSB-first data or zeros.

FIGURE 5-1:

Communication with MCP3201 device using MSB first Format.

tCYC

tCSH

CS

tSUCS

POWER DOWN

CLK

tSAMPLE

DOUT

HI-Z

tCONV

tDATA**

NULL

BIT

B11B10

B9

B8

B7

B6

B5

B4

B3

B2

B1

B0

B1

B2

B3

B4

B5

B6

B7

B8

B9 B10B11*

HI-Z

* After completing the data transfer, if further clocks are applied with CS low, the A/D Converter will output zeros indefinitely.

** tDATA: during this time, the bias current and the comparator power down and the reference input becomes a high-impedance

node, leaving the CLK running to clock out the LSB-first data or zeros.

FIGURE 5-2:

Communication with MCP3201 device using LSB first Format.

© 2008 Microchip Technology Inc.

DS21290E-page 19

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