SST36VF1601G データシートの表示（PDF） - Silicon Storage Technology
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SST36VF1601G Datasheet PDF : 36 Pages
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Data Sheet
16 Mbit Concurrent SuperFlash
SST36VF1601G / SST36VF1602G
TOP VIEW (balls facing down)
8
A15 NC NC A16 BYTE# VSS
7
A11 A12 A13 A14 NC DQ15/A-1 DQ7 DQ14
6
A8 A19 A9 A10 DQ6 DQ13 DQ12 DQ5
5
WE# NC NC
DQ4 NC NC
4
WP# RST# RY/BY#
DQ3 VDD DQ11
3
NC NC A18 A17 DQ1 DQ9 DQ10 DQ2
2
A7 A6 A5 A4 VSS OE# DQ0 DQ8
1
A3 A2 A1 A0 CE# NC
ABCDEFGH
FIGURE 8: Pin Assignments for 56-lead LFBGA (8mm x 10mm)
TABLE 4: Pin Description
Symbol Name
Functions
A19-A0
Address Inputs
To provide memory addresses. During Sector-Erase and Hardware Sector Protection,
A19-A11 address lines will select the sector. During Block-Erase A19-A15 address
lines will select the block.
DQ14-DQ0 Data Input/Output
To output data during Read cycles and receive input data during Write cycles
Data is internally latched during a Write cycle. The outputs are in tri-state when
OE# or CE# is high.
DQ15/A-1
CE#
Data Input/Output
and LBS Address
Chip Enable
DQ15 is used as data I/O pin when in x16 mode (BYTE# = “1”)
A-1 is used as the LSB address pin when in x8 mode (BYTE# = “0”)
To activate the device when CE# is low.
OE#
Output Enable
To gate the data output buffers
WE#
Write Enable
To control the Write operations
RST#
Hardware Reset
To reset and return the device to Read mode
RY/BY# Ready/Busy#
To output the status of a Program or Erase operation
RY/BY# is a open drain output, so a 10KΩ - 100KΩ pull-up resistor is required
to allow RY/BY# to transition high indicating the device is ready to read.
WP#
Write Protect
To protect and unprotect top or bottom 8 KWord (4 outermost sectors) from Erase or
Program operation.
BYTE# Word/Byte Configuration To select 8-bit or 16-bit mode.
VDD
Power Supply
VSS
Ground
NC
No Connection
To provide 2.7-3.6V power supply voltage
Unconnected pins
T4.0 1342
©2006 Silicon Storage Technology, Inc.
12
S71342-00-000
12/06
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