SST49LF008A-33-4C-EHE データシートの表示（PDF） - Silicon Storage Technology
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SST49LF008A-33-4C-EHE Datasheet PDF : 42 Pages
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8 Mbit Firmware Hub
SST49LF008A
TABLE 8: Operation Modes Selection (PP Mode)
Mode
Read
Program
Erase
RST#
VIH
VIH
VIH
OE#
VIL
VIH
VIH
WE#
VIH
VIL
VIL
Reset
VIL
X
X
Write Inhibit
VIH
VIL
X
X
X
VIH
Product Identification
VIH
VIL
VIH
1. X can be VIL or VIH, but no other value.
2. Device ID = 5AH for SST49LF008A
Data Sheet
DQ
DOUT
DIN
X1
High Z
High Z/DOUT
High Z/DOUT
Manufacturer’s ID (BFH)
Device ID2
Address
AIN
AIN
Sector or Block address,
XXH for Chip-Erase
X
X
X
A18-A1=VIL, A0=VIL
A18-A1=VIL, A0=VIH
T8.6 1161
Data Protection
The SST49LF008A device provides both hardware and
software features to protect nonvolatile data from inadvert-
ent writes.
Hardware Data Protection
Noise/Glitch Protection: A WE# pulse of less than 5 ns will
not initiate a Write cycle.
VDD Power Up/Down Detection: The Write operation is
inhibited when VDD is less than 1.5V.
Write Inhibit Mode: Forcing OE# low, WE# high will inhibit
the Write operation. This prevents inadvertent writes during
power-up or power-down.
Software Data Protection (SDP)
SST49LF008A provides the JEDEC approved Software
Data Protection scheme for all data alteration operation,
i.e., Program and Erase. Any Program operation requires
the inclusion of a series of three-byte sequences. The
three-byte load sequence is used to initiate the Program
operation, providing optimal protection from inadvertent
Write operations, e.g., during the system power-up or
power-down. Any Erase operation requires the inclusion of
a six-byte load sequence. The SST49LF008A device is
shipped with the Software Data Protection permanently
enabled. See Table 9 for the specific software command
codes. During SDP command sequence, invalid com-
mands will abort the device to Read mode, within TRC.
©2006 Silicon Storage Technology, Inc.
19
S71161-11-000
3/06
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