STV7620S/M/F
9 AC TIMING REQUIREMENTS
(Vcc = 4.5v to 5.5v, T amb = -20 to +85°C, input signals max leading edge & trailing edge (tr,tf) = 5ns)
Symbol
tCLK
tWHCLK
tWLCLK
tSDAT
tHDAT
tHSTB
tSTB
tSSTB
Parameter
Data clock period
Duration of CLK pulse at high level
Duration of CLK pulse at low level
Set-up time of data input before low to high clock transition
Hold-time of data input after low to high clock transition
Hold-time of STB after low to high clock transition
STB low level pulse duration
STB set-up time before CLK rise
Min. Typ Max Unit
25
-
-
ns
10
-
-
ns
10
-
-
ns
5
-
-
ns
5
-
-
ns
5
-
-
ns
10
-
-
ns
5
ns
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