STV7710
8
AC timing characteristics
AC timing characteristics
VCC = 5 V, VPP = 70 V, VSSP = 0 V, VSSSUB = 0 V, Vsslog = 0 V, Tamb = 25°C, fCLK = 40 MHz
(VILMAX = 0.2 Vcc, VIHMIN = 0.8 VCC)
Table 12. AC timing characteristics
Symbol
Parameter
Min
Typ
Max
Unit
Delay of power output change after CLK transition
tPHL1
- high to low
-
tPLH1
- low to high
-
Delay of power output change after STB transition
tPHL2
- high to low
tPLH2
- low to high
-
Delay of power output change after BLK, POC
tPHL3
transition
tPLH3
- high to low
- low to high
-
tR OUT
Power output rise time(1)
50
tF OUT
Power output fall time(1)
50
tS
Width of the falling edge smooth shape
(not tested)(2)
-
tR DAT
Logic data output rise time (CL = 10pF)
-
tF DAT
Logic data output fall time (CL = 10pF)
-
Delay of logic data output change after CLK
tPHL4
transition
tPLH4
- high to low
-
- low to high
-
35
100
ns
30
100
ns
-
95
ns
-
95
ns
25
90
ns
20
90
ns
-
200
ns
-
200
ns
30
-
ns
9
20
ns
5
12
ns
12
25
ns
13
25
ns
1. One output among 96, loading capacitor CL = 50pF, other outputs at low level
2. See Figure 7: Zoom for OUTn showing tS and tF OUT
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