ADVANCED COMMUNICATIONS & SENSING
SX1230
Integrated Transmitter IC
DATASHEET
6.2.2. Data and Data Clock Usage
In MCU mode the data to be transmitted is applied exclusively via the DATA input. The DATA input is sampled at the crystal
frequency, fxosc. Where the MCU mediates the data rate and no gaussian or bit filtering is required, then the use of the data
clock signal is optional. However, where filtering is to be used or the specified data rate accuracy is to be achieved, then
the rising edge of the data clock, DCLK, signal must be used to clock the data into the SX1230 DATA input.
T_DATA T_DATA
DATA (NRZ)
DCLK
Figure 9. SX1230 Data Clock Timing Diagram (Used Only for Filtering and Ensuring Bit Rate Accuracies)
SX1230, Revision 2 May 2009
©2008 Semtech Corp.
Page 20
www.semtech.com