SX1233 データシートの表示（PDF） - Semtech Corporation

部品番号

コンポーネント説明

メーカー

SX1233

High Bit Rate Transceiver Low Power Integrated UHF Transceiver

Semtech Corporation 

SX1233

ADVANCED COMMUNICATIONS & SENSING

DATASHEET

3.3.4. Lock Time

PLL lock time TS_FS is a function of a number of technical factors, such as synthesized frequency, frequency step, etc.

When using the built-in sequencer, the SX1233 optimizes the startup time and automatically starts the receiver or the

transmitter when the PLL has locked. To manually control the startup time, the user should either wait for TS_FS max given

in the specification, or monitor the signal PLL lock detect indicator, which is set when the PLL has is within its locking

range.

When performing an AFC, which usually corrects very small frequency errors, the PLL response time is approximately:

TPLLAFC

=

---------5----------

PLLBW

In a frequency hopping scheme, the timings TS_HOP given in the table of specifications give an order of magnitude for the

expected lock times.

3.3.5. Lock Detect Indicator

A lock indication signal can be made available on some of the DIO pins, and is toggled high when the PLL reaches its

locking range. Please refer to Table 19 and Table 20 to map this interrupt to the desired pins.

Rev 3.April 2010

Page 18

www.semtech.com

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