T2801(2001) データシートの表示（PDF） - Atmel Corporation
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T2801 Datasheet PDF : 27 Pages
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T2801
Serial Programming Bus
The transceiver is programmed by the 3-wire bus
(CLOCK, DATA and ENABLE).
After setting enable signal to low condition, on the rising
edge of the clock signal, the data is transferred bit by bit
into the shift register, starting with the MSB-bit. After
enable returning to high condition the programmed
information is loaded into the addressed latches,
according to the addressbit condition (last bit). Additional
leading bits are ignored and there is no check made how
many pulses arrived during enable-low condition. During
enable low condition the bus current is increased to speed
up the bus logic.
The programming of the transceiver is separated into two
data words. Data word 1 controls mainly the channel in-
formation together with settings, which are closely
related with the channel. Dataword 2 holds setup informa-
tion, which is adjusted during production.
Data Word 1
MSB
LSB
Data bits
Address
bit
D22 D21 D20 D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A0
RC
SC
MC
VCOS 1 1 GF MCC
GFCS
VCODAC
CPCS
1
Data Word 2
E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 E0 A0
DEMODDAC
MCCS
TEST
0
Data Word 1 Programs
PLL Settings
With the Reference Counter bits D21 – D22
RC (Reference Counter)
D22
D21
SRC
REF_CLK
0
0
3
10.368 MHz
0
1
4
13.824 MHz
1
0
6
20.736 MHz
With the Main Counter bits D14 – D15
MC (Main Counter)
D15
D14
SMC
0
0
32
0
1
33
1
0
34
1
1
35
With the Swallow Counter bits D16 – D20
SC (Swallow Counter)
D20 D19 D18 D17 D16 SSC
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
1
0
2
...
...
1
1
1
0
1
29
1
1
1
1
0
30
1
1
1
1
1
31
Rev. A9, 11-Dec-01
Preliminary Information
17 (27)
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