Functional Description
1. Output section (OUT −U, OUT−V, OUT−W)
• The configuration of the output stage is shown in
the chart to the right.
• The PWM operation takes off−on control of the
upper side transistor.
• Be sure to set the schottky barrier diode outside,
because the current flows to the lower−side diode
when PWM is off.
2. Input circuit (IN−U, IN−V, IN−W)
• The three−phase input receivs three−state
impedance (high. low, high impedance) from the
controller side.
3. Overheat protection circuit
• When junction temperature Tj is Tj≥TSD (on)
(overheat protection operation temperature)
when TSD−SEL = "low", the entire output
maintains an off state.
To cancel this state,
(1) Reapply the supply voltage.
(2) Apply "
" signal to the TSD−SEL pin.
• When TSD−SEL = "high", an automatic return
mode takes place.
TA8483CP
10 VCC
OUT−U
9
OUT−V
7
6 OUT−W
VI
8
< Output circuit >
IN 11, 12, 13
10kΩ
50kΩ
< Input circuit >
Internal logic
power supply
(≃ 6.7V)
Lower side
PwTr control
Circuit
Upper side
PwTr control
circuit
4. Excess current detection circuit (VISD, ISD)
• The voltage in current detection resistor RF
outside VI pin is input to the VISD pin.
• When VISD voltage rises above internal reference
voltage VRF (≃ 0.5V), excess current detection
circuit ISD becomes "high".
VISD 14
+
−
Internal logic
power supply
(≃ 6.7V)
1 ISD
< Excess current detection circuit >
4
2006-3-2