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AN83C196LC-18 データシートの表示(PDF) - Intel
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AN83C196LC-18
CHMOS 16-BIT MICROCONTROLLER
Intel
AN83C196LC-18 Datasheet PDF : 22 Pages
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83C196LC, 83C196LD
— AUTOMOTIVE
Watchdog
Timer
Port 6
Port 0
Enhanced
SSIO
Peripheral Addr Bus (10)
Peripheral Data Bus (16)
Bus Control
AD15:0
Bus
Controller
Bus-Control
Interface Unit
Queue
Microcode
Engine
Source (16)
Register RAM
Memory
ALU
1 Kbyte (LC)
Interface
384 Bytes (LD)
Unit
Destination (16)
Peripheral
Transaction
Server
Interrupt
Controller
Port 2
SIO
Baud-rate
Generator
EPA
6 Capture/
Compare
Channels
†
2 Timers
2
Compare-only
Channels
Port 1,6
Code/Data RAM
512 Bytes
(LC only)
ROM
32 Kbytes (LC)
16 Kbytes (LD)
†
A seventh capture/compare channel (EPA7) is available as a software timer. It is not connected to a package pin.
A3383-01
Figure 1. 83C196LC, 83C196LD Block Diagram
2
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