TDA8005 データシートの表示（PDF） - Philips Electronics

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TDA8005

Low-power smart card coupler

Philips Electronics 

Philips Semiconductors

Low-power smart card coupler

Product specification

TDA8005

handbook, full pagewidth

T/R = 0

or

LCT = 1

start session ↑ and T/R = 0

SET ENABLE FSD

clock starts

INHIBIT I/O DURING 200 CLK

SAMPLE I/O EVERY 31 CLK

I/O = 0

SAMPLE I/O AT 186

AND EVERY 372 CLK

10th bit

CONVERT AND LOAD CHARACTER

IN RECEPTION BUFFER AT 10 ETU

5th bit

CHECK PARITY

DISABLE I/O BUFFER BETWEEN

10 AND 12 ETU

parity error

SET FSD STATUS REGISTER

IN FSD IS ENABLED

RESET EN FSD

SET CONVENTION

(1)

IF START SESSION = 1

SET BIT RECEPTION PARITY

ERROR AT 10 ETU

PULL I/O LINE LOW FROM

10.5 TILL 11.75 ETU

SET BIT BUFFER FULL AT 10 ETU (2)

RESET RECEPTION PART AT 12 ETU

T/R =1

(1) The start session is reset by software.

(2) The software may load the received character in the peripheral

control at any time without any action on the ISO UART.

Fig.6 ISO UART reception flow chart.

MBH636

When the controller needs to transmit data to the card, it

first sets the bit UC3 in the UART CONFIGURATION

which configures the UART in the transmission mode.

As soon as a character has been written in the UART

TRANSMIT register, the UART makes the conversion,

calculates the parity and starts the transmission on the

rising edge of ENABLE. When the character has been

transmitted, it surveys the I/O line at 11 ETU in order to

know if an error has been detected by the card.

1996 Sep 25

15

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