Philips Semiconductors
10-bit high-speed analog-to-digital
converter
Product specification
TDA8760
SYMBOL
PARAMETER
CONDITIONS
MIN.
SIGNAL-TO-NOISE RATIO; notes 4 and 5; see Fig.7
SNR
signal-to-noise ratio
without harmonics;
54
fclk = 40 MHz;
fi = 4.43 MHz; Tamb = 25 °C
EFFECTIVE BITS; notes 4 and 5; see Fig.7
EB
effective bits
fi = 4.43 MHz
−
TDA8760K/2 (fclk = 20 MHz) fi = 7.5 MHz
−
effective bits
fi = 4.43 MHz
−
TDA8760K/4 (fclk = 40 MHz) fi = 10 MHz
−
TWO-TONE
Two-tone two-tone intermodulation
fclk = 40 MHz; note 8
−
rejection
BIT ERROR RATE
BER
bit error rate
fclk = 40 MHz;
−
fi = 4.43 MHz; VI = ±16 LSB
at code 512
DIFFERENTIAL GAIN; see Fig.5
Gdiff
differential gain
DIFFERENTIAL PHASE
Φdiff
differential phase
Timing (note 6; see Fig.3; CL = 15 pF)
tds
sampling delay time
th
output hold time
td
output delay time
3-state output delay times (see Fig.4)
tdZH
enable HIGH
tdZL
enable LOW
tdHZ
disable HIGH
tdLZ
disable LOW
fclk = 20 MHz; fi = 4.43 MHz −
fclk = 40 MHz; fi = 4.43 MHz −
fclk = 40 MHz; fi = 4.43 MHz −
−
8
−
−
−
−
−
TYP.
MAX.
56
−
8.70
−
8.50
−
8.50
−
8.20
−
−60
−
2 × 10−12 −
0.5
−
1.0
−
0.1
0.2
−
2
−
−
12
16
12
16
12
16
8
12
16
20
UNIT
dB
bits
bits
bits
bits
dB
times/
samples
%
%
deg
ns
ns
ns
ns
ns
ns
ns
1996 Sep 12
12