TDA9106A データシートの表示（PDF） - STMicroelectronics
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TDA9106A Datasheet PDF : 30 Pages
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TDA9106A
HORIZONTAL SECTION (continued)
Electrical Characteristics (VCC = 12V, Tamb = 25oC) (continued)
Symbol
Parameter
Test Conditions
Min. Typ. Max. Unit
1st PLL SECTION
HpolT Polarity Integration Delay
0.75
ms
VVCO VCO Control Voltage (Pin12)
Vcog VCO Gain (Pin 12)
Hph
Hphmin
Hphtyp
Hphmax
f0
Horizontal Phase Adjustment
Horizontal Phase Decoupling Output
Minimum Value
Typical Value
Maximum Value
Free Running Frequency
dF0/dT Free Running Frequency Thermal Drift
(No drift on external components)
VREF-H = 8V
f0
fH(Max.)
R0 = 6.49kΩ, C0 = 820pF,
dF/dV = 1/11R0C0
% of Horizontal Period
Sub-Address 01, Pin 14
Byte x1111111
Byte x1000000
Byte x0000000
R0 = 6.49kΩ, C0 = 820pF,
f0 = 0.97/8R0C0
VREF-H / 6
6.2
17
±10
2.8
3.4
4.0
22.3
-150
V
V
kHz/V
%
V
V
V
kHz
ppm/C
CR PLL1 Capture Range
PLLinh PLL1 Inhibition (Pin3)
SFF Safe Forced Frequency
SF1 Byte 11xxxxxx
SF2 Byte 10xxxxxx
VCO Sawtooth Level
FC1
High FC1=(4.VREF-H)/5
FC2
Low FC2=(VREF-H)/5
R0 = 6.49kΩ, C0 = 820pF,
from f0+0.5kHz to 4.5F0
fH(Min.)
fH(Max.)
100
23.5 kHz
kHz
Typ Threshold = 1.6V
PLL ON
PLL OFF
2
0.8
V
V
Sub-Address 02
2F0
3F0
Pin 9 To filter
Pin 8 To filter
6.4
V
1.6
V
2nd PLL SECTION AND HORIZONTAL OUTPUT SECTION
FBth
Hjit
XRAYth
Flyback Input Threshold Voltage (Pin 6)
Horizontal Jitter (see Pins 8-9 filtering)
Horizontal Drive Output Duty-Cycle
(Pin 20 or 21) (see Note 1)
X-RAY Protection Input Threshold Voltage
Pin 15
0.65 0.75
V
TBD
ppm
48
%
8
V
Vphi2
VSCinh
IHblk
Internal Clamping Levels on 2nd PLL Loop
Filter (Pin 4)
Threshold Voltage To Stop H-Out,V-Out
when VCC < VSCinh
Maximum Horizontal Blanking Output
Current
Low Level
High Level
Pin 18
I22
1.6
V
4.0
V
7.5
V
10 mA
VHblk Horizont al Blanking Output Low Level V22 with I22 = 10mA
(Blanking ON)
0.25 0.5
V
HDvd
HDem
Horizontal Drive Output
Low Level (Pin 20 to GND)
High Level (Pin 21 to VCC=12V)
V21-V20, IOUT = 20mA
V20, IOUT = 20mA
1.1 1.7
V
9.5
10
V
Notes : 1. Duty Cycle is the ratio of power transistor OFF time to period. Power transistor is OFF when output transistor is OFF.
2. Initial Condition for Safe Operation Start Up (Max. duty cycle).
7/30
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