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TDF8599ATH データシートの表示(PDF) - NXP Semiconductors.

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TDF8599ATH Datasheet PDF : 54 Pages
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NXP Semiconductors
TDF8599A
I2C-bus controlled dual channel class-D power amplifier
PWM
CONTROL
DRIVER
HIGH
DRIVER
LOW
PWM
CONTROL
DRIVER
HIGH
DRIVER
LOW
Fig 16. DC load detection circuit
VP
B
OUTN
PGND1
VP
OUTP
PGND2
RL
001aai787
out (V)
out
out+
td(stb-mute)
tdet(DCload)
t (s)
001aai788
Fig 17. DC load detection procedure
The capacitor connected to pin SEL_MUTE (see Figure 3 on page 6) is used to create an
inaudible current test pulse, drawn from the positive amplifier output. The diagnostic
‘speaker load’ (or ‘open load’), based on the voltage difference between pins OUTxP and
OUTxN is shown in Figure 18.
SPEAKER LOAD
OPEN LOAD
0
25 350
001aaj956
Fig 18. DC load detection limits
Remark: DC load detection identifies a short circuited speaker as a valid speaker load.
OCP detection, using byte DB1[D3] for channel 1 and byte DB2[D3] for channel 2,
performs diagnostics on shorted loads. However, the diagnostics are performed after the
DC load detection cycle has finished and once the amplifier is in Operating mode.
The result of the DC load detection is stored in bits DB1[D4] and DB2[D4].
TDF8599A_2
Product data sheet
Rev. 02 — 30 June 2009
© NXP B.V. 2009. All rights reserved.
19 of 54

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