28F016S5 データシートの表示（PDF） - Intel

部品番号

コンポーネント説明

メーカー

28F016S5

SMART 5 FlashFile™ MEMORY FAMILY 4, 8, AND 16 MBIT

Intel 

BYTE-WIDE SMART 5 FlashFile™ MEMORY FAMILY

E

Start

Write 40H,

Address

Write Byte

Data and Address

Read

Status Register

0

SR.7 =

1

Full Status

Check if Desired

Program Complete

Bus

Operation

Write

Write

Command

Comments

Setup

Program

Data = 40H

Addr = Location to Be Programmed

Program

Data = Data to Be Programmed

Addr = Location to Be Programmed

Read

Status Register Data

Suspend

Program Loop

No

Suspend

Program

Yes

Standby

Check SR.7

1 = WSM Ready

0 = WSM Busy

Repeat for subsequent byte writes.

SR full status check can be done after each program, or after a

sequence of program operations.

Write FFH after the last program operation to reset device to

read array mode.

FULL STATUS CHECK PROCEDURE

Read Status Register

Data (See Above)

1

SR.3 =

0

1

SR.1 =

0

1

SR.4 =

0

VPP Range Error

Device Protect Error

Program Error

Program Successful

Bus

Operation

Command

Comments

Standby

Standby

Check SR.3

1 = VPP Error Detect

Check SR.1

1 = Device Protect Detect

RP# = V IH , Block Lock-Bit Is Set

Only required for systems

implementing lock-bit configuration

Standby

Check SR.4

1 = Program Error

SR.4, SR.3 and SR.1 are only cleared by the Clear Status Register

command in cases where multiple locations are written before

full status is checked.

If error is detected, clear the Status Register before attempting

retry or other error recovery.

Figure 7. Automated Program Flowchart

20

PRODUCT PREVIEW

Share Link: