TEA2029 データシートの表示（PDF） - STMicroelectronics

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TEA2029

APPLICATION NOTE

STMicroelectronics 

TEA2028 - TEA2029 APPLICATION NOTE

V.5.2.2 - Low-pass filter f(p)

The horizontal phase-shift adjustment is taken into

account : see Figure 39

- Filter V = f(i) transfer characteristic is given as :

V

=

Zi

+

Z

R

⋅

K

⋅

VCC

-

Z

⋅

IIN

Where :

•

Z

=

RIN

//

R //

1

C⋅

p

• RIN, IIN : modulator input characteristics

Figure 39

i

ϕ2

Comparator

Phase Modulator

R IN

I IN

V

16

+

VCC

Horizontal

R

Phase P

Adjust

C

KVCC

In Dynamic Mode

-

V

=

Zi

⇒

f(p) =V

i

= Z(p)

=

1

R′

+ τp

Where :

• R’ = RIN // R (R >> Potentiometer P)

• τ = R’ . C : Filter time constant

The network behaves as a first order low-pass filter

whose

cut-off

frequency

at

-3dB

is

:

f-3dB

=

1

2πR′C

Filter component values

- R = 470kΩ and C = 22nF

• In practice, (K ∈ [0,1]) VCC = 12V

- RIN = 25MΩ , IIN = 0.65µA (base input current)

• F−3db = 15.7Hz with adjustment and 0.3Hz with-

out adjustment

V.5.2.3 - Phase modulator

This is built around a comparator which converts

the filter voltage to a rectangular waveform such

that its rising edge phase, variable as a function of

filter voltage ”V”, will trigger the line transistor turn-

off control circuitry.

The conversion gain is determined by the slope of

the line saw-tooth applied to comparator.

Figure 40

16

V

V13 (t)

Figure 41

3. 5 V

V

V13 (t)

t’OUT

V’OUT

0

t1

t 2 = f(v)

V’OUT

TH

Vϕ2

t IN ( ϕ2)

Line Output

Signal (Pin 10)

T10 = constant

Line Flyback

(LF)

t IN = 0

tD

t’OUT t OUT

Transfer characteristic is given by :

∆t′OUT

∆V

=

∆t13

∆V13

=

B

=

16.4µs/V

therefore t2

=

B.V

Let’s consider the delay interval between ”tOUT”

and the reference time ”tIN”

where tOUT is the middle of line flyback :

tOUT - tIN = t2 + td + t1 - tH

Where :

- t1 = 4.3µs

Reset for V13 and Vφ2 are signals coming from line

logic block and are synchronized on line sync

- td = 2 to 15µs

Delay between leading edge of output signal -

Pin 10 - and the middle of line flyback

- tH = 64µs

- tOUT - tIN = B.V + td - 59.7µs

V.5.2.4 - Line flip-flop (TEA2028 only for TEA2029

refer to Section VII.6)

It generates a constant duration rectangular signal

used to turn-off the line transistor. It is triggered by

the rising-edge of the phase comparator output

voltage and reset after capacitor on pin 1 is

charged.

21/46

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