CXD3503R データシートの表示（PDF） - Sony Semiconductor

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CXD3503R

Color Shading Correction IC for Liquid Crystal Projectors

Sony Semiconductor 

CXD3503R

HP7 to 0

This sets the correction signal output start position in the horizontal direction. The timing until the start of

correction signal output is set using the front edge of HSYNC as the reference. However, do not set HP7 to 0

to a value of 54 or less, as the arithmetically processed correction signal may not be output correctly in this

case. In addition, the waveform may be disturbed by the HP and HINT values and the VST phase. In these

cases, eliminate the disturbance by adjusting the HP and DACKO phase.

HSYNC

Set by HP7 to 0

DACO

HINT7 to 0

This sets the correction point interval in the horizontal direction. Normally, when using 16 points in the

horizontal direction, calculate the number of clocks at which the horizontal period can be divided into 16

sections taking into account the input clock and the system clock speed, and then set this value – 1. However,

do not input a value of 11 or less to HINT7 to 0, as the internal arithmetic processing may not be able to keep

up and the correct value may not be output in this case.

Example 1) Inputting a dot clock 40MHz signal to a SVGA panel (800 × 600)

If 1/2 the dot clock is input as the master clock and the mode without internal 1/2 frequency

division (SLCK: L) is used:

HINT = (800 ÷ 16 ÷ 2) – 1 = 24

Example 2) Inputting a dot clock 65MHz signal to a XGA panel (1024 × 768)

If 1/2 the dot clock is input as the master clock and the mode with internal 1/2 frequency division

(SLCK: H) is used:

HINT = (1024 ÷ 16 ÷ 4) – 1 = 15

Internal clock

DACO

Set by HINT

fm, n

fm, n + 1

HINT = 15

– 14 –

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