TSA1002CF(2000) データシートの表示（PDF） - STMicroelectronics

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TSA1002CF
(Rev.:2000)

10-BIT, 50MSPS, 50mW A/D CONVERTER

STMicroelectronics 

TSA1002

capacitance, buffers or latches close to the output

pins will relax this constraint.

- Choose component sizes as small as possible

(SMD).

EVAL1002 evaluation board

The characterization of the board has been made

with a fully ADC devoted test bench as shown on

Figure 10. The analog signal must be filtered to be

very pure.

The dataready signal is the acquisition clock of the

logic analyzer.

The ADC digital outputs are latched by the octal

buffers 74LCX573.

All characterization measurements have been

made with:

SFSR=+0.2dB for static parameters.-

SFSR=-0.5dB for dynamic parameters.

Figure 10 : Analog to Digital Converter characterization bench

Power

HP8644B

Sine wave

Generator

Vin

ADC

data

evaluation

Logic

board

Analyzer

dataready

ck

HP8133A

Pulse

Generator

TLA704

Sine Wave

HP8644B Generator

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