TSL2580 データシートの表示（PDF） - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS

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TSL2580

LIGHT-TO-DIGITAL CONVERTER

TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS 

TSL2580, TSL2581

LIGHT-TO-DIGITAL CONVERTER

TAOS098 − MARCH 2010

Interrupt Threshold Register (03h − 06h)

The interrupt threshold registers store the values to be used as the high and low trigger points for the comparison

function for interrupt generation. If the value generated by channel 0 crosses below or is equal to the low

threshold specified, an interrupt is asserted on the interrupt pin. If the value generated by channel 0 crosses

above the high threshold specified, an interrupt is asserted on the interrupt pin. Registers THLLOW and

THLHIGH provide the low byte and high byte, respectively, of the lower interrupt threshold. Registers THHLOW

and THHHIGH provide the low and high bytes, respectively, of the upper interrupt threshold. The high and low

bytes from each set of registers are combined to form a 16-bit threshold value. The interrupt threshold registers

default to 00h on power up.

REGISTER

THLLOW

THLHIGH

THHLOW

THHHIGH

Table 9. Interrupt Threshold Register

ADDRESS

3h

4h

5h

6h

BITS

7:0

7:0

7:0

7:0

DESCRIPTION

ADC channel 0 lower byte of the low threshold

ADC channel 0 upper byte of the low threshold

ADC channel 0 lower byte of the high threshold

ADC channel 0 upper byte of the high threshold

NOTE: Since two 8-bit values are combined for a single 16-bit value for each of the high and low interrupt thresholds, the Send Byte protocol should

not be used to write to these registers. Any values transferred by the Send Byte protocol with the MSB set would be interpreted as the

COMMAND field and stored as an address for subsequent read/write operations and not as the interrupt threshold information as desired.

The Write Word protocol should be used to write byte-paired registers. For example, the THLLOW and THLHIGH registers (as well as

the THHLOW and THHHIGH registers) can be written together to set the 16-bit ADC value in a single transaction.

Analog Register (07h)

The ANALOG register provides eight bits of control to the analog block. These bits control the analog gain

settings of the device.

Bit : 7

Address

07h

FIELD

Resv

BITS

7:3

Gain

2:0

Table 10. Analog Register

6

5

4

3

2

1

0

RESV

GAIN

DESCRIPTION

Reserved. Write as 0.

Gain Control. Sets the analog gain of the device according to the following table.

FIELD VALUE

GAIN VALUE

x00

1×

x01

8×

x10

16×

x11

111×

Reset

00h

Copyright E 2010, TAOS Inc.

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