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UJA1061 データシートの表示(PDF) - NXP Semiconductors.

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UJA1061 Datasheet PDF : 77 Pages
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NXP Semiconductors
UJA1061
Fault-tolerant CAN/LIN fail-safe system basis chip
2. Features and benefits
2.1 General
„ Contains a full set of CAN and LIN ECU functions:
‹ CAN transceiver and LIN transceiver
‹ Voltage regulator for the microcontroller (3.3 V or 5.0 V)
‹ Separate voltage regulator for the CAN transceiver (5 V)
‹ Enhanced window watchdog with on-chip oscillator
‹ Serial Peripheral Interface (SPI) for the microcontroller
‹ ECU power management system
‹ Fully integrated autonomous fail-safe system
„ Designed for automotive applications:
‹ Supports 14 V, 24 V and 42 V architectures
‹ Excellent ElectroMagnetic Compatibility (EMC) performance
‹ ±8 kV ElectroStatic Discharge (ESD) protection Human Body Model (HBM) for
off-board pins
‹ ±6 kV ElectroStatic Discharge (ESD) protection IEC 61000-4-2 for off-board pins
‹ ±60 V short-circuit proof CAN/LIN-bus pins
‹ Battery and CAN/LIN-bus pins are protected against transients in accordance with
ISO 7637
‹ Very low sleep current
„ Supports remote flash programming via the CAN-bus
„ Small 6.1 mm × 11 mm HTSSOP32 package with low thermal resistance
2.2 CAN transceiver
„ ISO 11898-3 compliant fault-tolerant CAN transceiver
„ Enhanced error signalling and reporting
„ Dedicated low dropout voltage regulator for the CAN-bus:
‹ Independent from microcontroller supply
‹ Guarded by CAN-bus failure management
‹ Significantly improves EMC performance
„ Partial networking option with global wake-up feature, allows selective CAN-bus
communication without waking up sleeping nodes
„ Bus connections are truly floating when power is off
„ Ground shift detection
2.3 LIN transceiver
„ LIN 2.0 compliant LIN transceiver
„ Enhanced error signalling and reporting
„ Downward compatible with LIN 1.3 and the TJA1020
UJA1061_6
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 06 — 9 March 2010
© NXP B.V. 2010. All rights reserved.
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