NXP Semiconductors
UJA1078
High-speed CAN/dual LIN core system basis chip
2. Features and benefits
2.1 General
Contains a full set of CAN and LIN ECU functions:
CAN transceiver and two LIN transceivers
Scalable 3.3 V or 5 V voltage regulator delivering up to 250 mA for a
microcontroller and peripheral circuitry; an external PNP transistor can be
connected for better heat distribution over the PCB
Separate voltage regulator for the CAN transceiver (5 V)
Watchdog with Window and Timeout modes and on-chip oscillator
Serial Peripheral Interface (SPI) for communicating with the microcontroller
ECU power management system
Designed for automotive applications:
Excellent ElectroMagnetic Compatibility (EMC) performance
±8 kV ElectroStatic Discharge (ESD) protection Human Body Model (HBM) on the
CAN/LIN bus pins and the WAKE pins
±6 kV ElectroStatic Discharge (ESD) protection IEC 61000-4-2 on the CAN/LIN bus
pins and the WAKE pins
±58 V short-circuit proof CAN/LIN bus pins
Battery and CAN/LIN bus pins are protected against transients in accordance with
ISO 7637-3
Supports remote flash programming via the CAN bus
Small 6.1 mm × 11 mm HTSSOP32 package with low thermal resistance
Pb-free; RoHS and dark green compliant
2.2 CAN transceiver
ISO 11898-2 and ISO 11898-5 compliant high-speed CAN transceiver
Dedicated low dropout voltage regulator for the CAN bus:
Independent of the microcontroller supply
Significantly improves EMC performance
Bus connections are truly floating when power is off
SPLIT output pin for stabilizing the recessive bus level
2.3 LIN transceivers
2 × LIN 2.1 compliant LIN transceivers
Compliant with SAE J2602
Downward compatible with LIN 2.0 and LIN 1.3
Low slope mode for optimized EMC performance
Integrated LIN termination diode at pin DLIN
2.4 Power management
Wake-up via CAN, LIN or local WAKE pins with wake-up source detection
2 WAKE pins:
WAKE1 and WAKE2 inputs can be switched off to reduce current flow
UJA1078_2
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 27 May 2010
© NXP B.V. 2010. All rights reserved.
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