UMA1005 データシートの表示（PDF） - Philips Electronics

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UMA1005

Dual low-power frequency synthesizer

Philips Electronics 

Philips Semiconductors

Dual low-power frequency synthesizer

SPEED-UP MODE

In ‘speed-up mode’ the current in output PHP is:

IPHP(S) = IPHP(N) + Ipump11 + Icomp11.

Where:

Ipump11 = Ipump10 × 2(CL + 1); charge pump current.

Icomp11 = Icomp10 × 2(CL + 1); fractional compensation

current.

In ‘speed-up mode’ the current in output PHI is:

IPHI(S) = Ipump21 + Icomp21.

Where:

Ipump21 = Ipump11 × CK; charge pump current.

Icomp21 = Icomp11 × CK; fractional compensation current.

Figure 7 shows that for a proper fractional compensation

the area of the fractional compensation current pulse must

be equal to the area of the charge pump ripple output. This

means that the current setting on the inputs RN and RF

must have following ratio: -II-R-R---NF-- = 6----4---2--×-9----C-×---N--Q----×--×---f--fi--V(--m-C---a-O--x--)---2- .

Where:

Q = fractional-N modulus.

fVCO = fi(max)1 × N; input frequency of the prescaler.

fi(max)1 = maximum input frequency of the main divider

(pins INM1 and INM2).

fi(max)2 = maximum input frequency of the reference

divider (pin INR).

Lock detect

The output LOCK is HIGH when the auxiliary phase

detector and the main phase detector indicate a lock

condition. The lock condition is defined as a phase

difference of less than ±1 cycle on the reference input INR.

The lock condition is also fulfilled when the relative counter

is disabled (EM = 0 or EA = 0 respectively) for the main or

auxiliary counter respectively.

Preliminary specification

UMA1005T

November 1994

12

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