UPA1916 データシートの表示（PDF） - NEC => Renesas Technology

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UPA1916

P-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR SWITCHING

NEC => Renesas Technology 

µ PA1916

ELECTRICAL CHARACTERISTICS (TA = 25°C)

CHARACTERISTICS

SYMBOL

TEST CONDITIONS

Zero Gate Voltage Drain Current

Gate Leakage Current

Gate Cut-off Voltage

IDSS

IGSS

VGS(off)

VDS = –12 V, VGS = 0 V

VGS = m8.0 V, VDS = 0 V

VDS = –10 V, ID = –1.0 mA

Forward Transfer Admittance

| yfs | VDS = –10 V, ID = –2.5 A

Drain to Source On-state Resistance

RDS(on)1 VGS = –4.5 V, ID = –2.5 A

RDS(on)2 VGS = –3.0 V, ID = –2.5 A

RDS(on)3 VGS = –2.5 V, ID = –2.5 A

RDS(on)4 VGS = –1.8 V, ID = –1.5 A

Input Capacitance

Ciss

VDS = –10 V

Output Capacitance

Coss

VGS = 0 V

Reverse Transfer Capacitance

Crss f = 1.0 MHz

Turn-on Delay Time

td(on) VDD = –6.0 V, ID = –2.5 A

Rise Time

tr

VGS = –4.0 V

Turn-off Delay Time

td(off)

RG = 10 Ω

Fall Time

tf

Total Gate Charge

QG

VDD = –10 V

Gate to Source Charge

QGS VGS = –4.0 V

Gate to Drain Charge

QGD ID = –4.5 A

Diode Forward Voltage

VF(S-D) IF = 4.5 A, VGS = 0 V

MIN. TYP. MAX. UNIT

–10 µA

m10 µA

–0.45 –0.8 –1.5 V

3.0

S

30 39 mΩ

36 49 mΩ

41 55 mΩ

59 98 mΩ

950

pF

330

pF

170

pF

15

ns

15

ns

140

ns

120

ns

8.0

nC

1.5

nC

2.5

nC

0.84

V

TEST CIRCUIT 1 SWITCHING TIME

D.U.T.

RG

PG.

VGS (−)

0

τ

τ = 1µs

Duty Cycle ≤ 1%

RL

VDD

VGS(−)

VGS

Wave Form

10 %

0

90 %

VGS

VDS(−)

90 %

VDS

VDS

0

Wave Form

td(on)

10 % 10 %

tr td(off)

90 %

tf

ton

toff

TEST CIRCUIT 2 GATE CHARGE

D.U.T.

IG = −2 mA

RL

PG.

50 Ω

VDD

2

Data Sheet G15635EJ1V0DS

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