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CXD2027Q データシートの表示(PDF) - Sony Semiconductor

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CXD2027Q
Sony
Sony Semiconductor Sony
CXD2027Q Datasheet PDF : 32 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CXD2027Q/R
Pin
No.
Symbol
35 RNO
36 VSS D/A
37 VSS Digital
38 SASL
39 N.C.
40 N.C.
41 N.C.
42 TST6
43 AUD
44 LRCK
45 BCLK
46 F256
47 DTUP
48 NSYN
49 VDD Digital
50 SDA
51 SCLK
52 VSS Digital
53 TST8
54 MUTE
55 VSS Digital
56 MCKO
57 MCKI
58 PHAB
59 VDD Digital
60 N.C.
61 N.C.
62 N.C.
63 VDD Digital
64 M23O
65 M23I
66 PHAA
67 ALCO
68 VSS Digital
69 N.C.
70 TST7
I/O
Pin Description
Remarks
O Rch D/A converter output
— Analog ground
— Digital ground
I I2C bus slave address select (L: D4, H: D6)
Internal pull down
— Non-connection
— Non-connection
— Non-connection
I Test pin; normally low
Internal pull down
O Audio data output for external DF/DAC
O LR clock output for external DF/DAC
O Bit clock output for external DF/DAC
O Clock output for external DF/DAC
O CCUP: control sign update flag/DED: BCH 2 error detection Switched by I2C bus
O Asynchronous flag (H: asynchronous; L: synchronous)
— Digital +5V power supply
I SDA (I2C bus)
I2C bus compatible
I SCL (I2C bus)
I2C bus compatible
— Digital ground
I Test pin; normally low
I External forced muting input
TTL input
— Digital ground
O MCKI inversion output
I 24.576MHz clock input
O Clock regeneration phase error data output
— Digital +5V power supply
— Non-connection
— Non-connection
— Non-connection
— Digital +5V power supply
O M23I inversion output
I 22.909088MHz clock input
O Carrier regeneration phase error data output
O ALC A/D control output
— Digital ground
— Non-connection
I Test pin; normally low
–8–

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