UPD16434G-001-12 データシートの表示（PDF） - NEC => Renesas Technology

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UPD16434G-001-12

1/8/ 1/15 DUTY LCD CONTROLLER/DRIVER

NEC => Renesas Technology 

µ PD16434

(2) 16-time-division (single-chip configuration)

Bank 0 and bank 1 are used in a pair, and the contents are read out to the column driver as 42 × 16-bit display

data.

Figure 2–7 shows correspondence of bits for the row driver and column driver for the data memory. If the data

located at the Rn and Cm intersection is 1, the corresponding LCD dot is ON. If the data is 0, the dot is OFF.

Figure 2–7. Data Memory (16-Time-Division, Single-Chip)

29H 28H

bit 0

1

2

3

Bank 0

4

5

6

7

0

1

2

3

Bank 1

4

5

6

7

01H 00H

R0

R1

R2

R3

R4

R5

R6

R7 Corresponding

R8 row signal

R9

R10

R11

R12

R13

R14

R15

C41 C40

C1 C0

To colmn driver

Data Sheet S10299EJ4V0DS00

17

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