UPD17717 データシートの表示（PDF） - NEC => Renesas Technology

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UPD17717

4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DEDICATED HARDWARE FOR DIGITAL TUNING SYSTEM

NEC => Renesas Technology 

µPD17717, 17718, 17719

1. PIN FUNCTIONS

1.1 Pin Function List

Pin No. Symbol

1

INT2

41 INT1

42 INT0

2

P1A3/INT4

3

P1A2/INT3

4

P1A1

5

P1A0/TM0G

6

P3A3

|

|

9

P3A0

10 P3B3

|

|

13 P3B0

14 P2A2

15 P2A1/FCG1

16 P2A0/FCG0

Function

Edge-detectable vectored interrupt input pins. Rising or falling edge can be

specified.

Output Form

–

Port 1A multiplexed with external interrupt request signal input and event

–

signal input pins.

• P1A3 through P1A0

• 4-bit input port

• INT4, INT3

• Edge-detectable vectored interrupt

• TM0G

• Input for gate of 8-bit timer 0

At reset

With clock stopped

Power-ON reset WDT&SP reset

CE reset

Input

Input

Retained

(P1A3 through P1A0) (P1A3 through P1A0)

Retained

4-bit I/O port.

Can be set in input or output mode in 4-bit units.

CMOS

push-pull

At reset

With clock stopped

Power-ON reset WDT&SP reset

CE reset

Input

Input

Retained

Retained

4-bit I/O port.

Can be set in input or output mode in 4-bit units.

CMOS

push-pull

At reset

With clock stopped

Power-ON reset WDT&SP reset

CE reset

Input

Input

Retained

Retained

Port 2A multiplexed with external gate counter input pins.

• P2A2 through P2A0

• 3-bit I/O port

• Can be set in input or output mode in 1-bit units.

• FCG1, FCG0

• Input for external gate counter

CMOS

push-pull

At reset

With clock stopped

Power-ON reset WDT&SP reset

CE reset

Input

Input

Retained

Retained

(P2A2 through P2A0) (P2A2 through P2A0) (P2A2 through P2A0) (P2A2 through P2A0)

11

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