UPD6464A データシートの表示（PDF） - NEC => Renesas Technology

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UPD6464A

ON-SCREEN CHARACTER DISPLAY CMOS LSI FOR 12-LINE, 24-COLUMN DECK-TYPE VCR

NEC => Renesas Technology 

µPD6464A,6465

2.5 Internal/external Mode Control, Crystal Oscillation Control Command

This command selects the video signal with which a character signal overlaps (internal mode/external mode)

and controls ON/OFF of crystal oscillation.

D7 D6 D5 D4 D3 D2 D1 D0

0

1

0

0

0

E/I

0

XOSC

XOSC

0

1

Crystal oscillation control bit

Function

Oscillation OFF

Oscillation ON

Internal/external mode control bit

E/I

Function

0 External video signal mode

1 Internal video signal mode

• Crystal oscillation control bit

This bit controls oscillation of the crystal for internal video signal generation. When crystal oscillation is turned

ON and the mode is changed from the external video signal mode to the internal video signal mode, the internal

video signal is selected without the screen disturbed.

When crystal oscillation is turned OFF, the synchronization separation circuit does not operate. Be sure to turn

ON crystal oscillation.

• Internal/external mode control bit

External video signal mode : In this mode, character signals are output to the µPD6464A and 6465, overlapping

the external video signal that is input from external. The overlapped signal is

output to the VBSO pin. If character signals should not be overlapped, set the

display ON/OFF control bit to 0 (Display OFF) with the display control command.

Moreover, a composite synchronization signal (Csync), which synchronizes with

the video signal input from external, is required to be input from the CSYIN pin.

If no Csync exists, input the composite synchronization signal generated from the

input video signal via the composite sync signal separation circuit (refer to 5.

COMPOSITE SYNC. SIGNAL SEPARATION CIRCUIT).

In the timing generator block built in the µPD6464A and 6465, a horizontal

synchronization signal and a vertical synchronization signal are generated by

separating from a composite synchronization signal synchronously. A reference

signal is generated from these synchronous signals. The reference signal is used

to reset and count the horizontal control block, vertical control block, and output

control block. If Csync is not input, characters may not be displayed because the

reference signal is not generated in the timing generator block.

Internal video signal mode : In this mode, characters are output overlapping the video signal that is created

in the µPD6464A and 6465 (e.g., blue back signal) to the VBSO pin. In the internal

video signal mode, characters can be displayed on the screen because horizontal

and vertical synchronization signals are generated in a device, even if no

composite synchronization signal is input.

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