µPD750004, 750006, 750008, 750004(A), 750006(A), 750008(A)
6.4 CLOCK OUTPUT CIRCUIT
The clock output circuit outputs a clock pulse from the P22/PCL pin. This clock pulse is used for remote control
waveform output, peripheral LSIs, etc.
• Clock output (PCL): Φ, 524, 262, or 65.5 kHz (at 4.19 MHz)
Φ, 750, 375, or 93.8 kHz (at 6.0 MHz)
From the clock
generator
Φ
fX/23
fX/24
fX/26
Fig. 6-3 Clock Output Circuit Configuration
Selector
Output
buffer
PCL/P22
CLOM3 0 CLOM1 CLOM0 CLOM
PORT2.2
P22 output
latch
4
Internal bus
Bit 2 of PMGB
Port 2 input/
output mode
specification bit
Remark Measures are taken to prevent outputting a narrow pulse when selecting clock output enable/disable.
24