µPD75004, 75006, 75008
5.3 CLOCK OUTPUT CIRCUIT
The clock output circuit outputs clock pulse from the P22/PCL pin. This clock output circuit is used to output
clock pulses to the remote control output, peripheral LSIs, etc.
• Clock output (PCL) : Φ, 524, 262, 65.5 kHz (operating at 4.19 MHz)
• Buzzer output (BUZ) : 2 kHz (operating at 4.19 MHz, or 32.768 kHz)
Fig. 5-2 shows the clock output circuit configuration.
From the
clock
generator
Φ
fX/23
fX/24
fX/26
Selector
Output
buffer
PCL/P22
CLOM3 CLOM2 CLOM1 CLOM0 CLOM
PORT2.2
P22 output
latch
4
Internal bus
Bit 2 of PMGB
Port 2 input/
output mode
specification
bit
Fig. 5-2 Clock Output Circuit Configuration
Remarks: A measures to prevent outputting narrow width pulse when selecting clock output enable/
disable is taken.
22