UPD75006GB データシートの表示（PDF） - NEC => Renesas Technology

部品番号

コンポーネント説明

メーカー

UPD75006GB

4-BIT SINGLE-CHIP MICROCOMPUTER

NEC => Renesas Technology 

µPD75004, 75006, 75008

5.5 WATCH TIMER

The µPD75008 has a built-in 1-ch watch timer. The watch timer is configured as shown in Fig. 5-4.

• Sets the test flag (IRQW) with 0.5 sec interval.

The standby mode can be released by IRQW.

• 0.5 second interval can be generated either from the main system clock or subsystem clock.

• Time interval can be advanced to 128 times faster (3.91 ms) by setting the fast mode. This is convenient

for program debugging, test, etc.

• Fixed frequency (2.048 kHz) can be output to the P23/BUZ pin. This can be used for beep and system clock

frequency trimming.

• The frequency divider circuit can be cleared so that zero second watch start is possible.

fX

From the 128

clock

(32.768 kHz)

generator f XT

(32.768 kHz)

fW

Selector

(32.768

kHz)

fW

27

(256 Hz: 3.91 ms)

Frequency divider

fW

Selector

2 14

(2 Hz

0.5 sec)

INTW

(IRQW

set signal)

f W (2.048

16 kHz)

Clear

Output buffer

P23/BUZ

WM

WM7 WM6 WM5 WM4 WM3 WM2 WM1 WM0

Bit test

8

instruction

Internal bus

PORT2.3

P23

output

latch

Bit 2 of PMGB

Port 2

input/output

mode

( ) is for fX = 4.194304 MHz, fXT = 32.768 kHz.

Fig. 5-4 Watch Timer Block Diagram

5.6 TIMER/EVENT COUNTER

The µPD75008 has a built-in 1-ch timer/event counter. The timer/even counter has these functions:

• Programmable interval timer operation

• Outputs square-wave signal of an arbitrary frequency to the PTO0 pin.

• Event counter operation

• Divides the TI0 pin input in N and outputs to the PTO0 pin (frequency divider operation).

• Supplies serial shift clock to the serial interface circuit.

• Count condition read out function

24

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