UPD750068GT データシートの表示（PDF） - NEC => Renesas Technology

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UPD750068GT

4 BIT SINGLE CHIP CMOS MICROCOMPUTERS

NEC => Renesas Technology 

µPD750064, 750066, 750068, 750064(A), 750066(A), 750068(A)

42 PIN PLASTIC SHRINK SOP (375 mil)

42

22

detail of lead end

1

A

21

H

I

J

C

N

D

MM

NOTE

Each lead centerline is located within 0.10

mm (0.004 inch) of its true position (T.P.) at

maximum material condition.

B

L

ITEM

A

B

C

D

E

F

G

H

I

J

K

L

M

N

MILLIMETERS

18.16 MAX.

1.13 MAX.

0.8 (T.P.)

0

.

3

5

+0.10

–0.05

0.125±0.075

2.9 MAX.

2.5±0.2

10.3±0.3

7.15±0.2

1.6±0.2

0

.

1

5

+0.10

–0.05

0.8±0.2

0.10

0.10

S42GT-80-375B-1

INCHES

0.715 MAX.

0.044 MAX.

0.031 (T.P.)

0

.

0

1

4

+0.004

–0.003

0.005±0.003

0.115 MAX.

0.098+–00..000098

0.406+–00..001123

0.281+–00..000098

0.063±0.008

0.006+–00..000042

0 . 0 3 1 +– 00 .. 00 00 98

0.004

0.004

Data Sheet U10165EJ2V0DS00

71

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