UPD75036CW-XXX データシートの表示（PDF） - NEC => Renesas Technology
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UPD75036CW-XXX Datasheet PDF : 58 Pages
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µPD75036
CHARACTERISTICS OF THE SUBSYSTEM CLOCK OSCILLATOR (Ta = -40 to +85 °C, VDD = 2.7 to 6.0 V)
Resonator
Crystal
resonator
External
clock
Recommended
constant
XT1 XT2 VDD
R
C3
C4
VDD
XT1
XT2
Parameter
Oscillator
frequency
(fXT) Note 1
Oscillation
settling time
Note 2
XT1 input
frequency
(fXT) Note 1
XT1 input
high/low
level width
(tXTH, tXTL)
Conditions
VDD = 4.5 to 6.0 V
Min.
Typ.
Max.
Unit
32
32.768
35
kHz
1.0
2
s
10
s
32
100
kHz
5
15
µs
Notes 1.
2.
The oscillator frequency and input frequency indicate only the oscillator characteristics. See the item
of AC characteristics for the instruction execution time.
The oscillation settling time means the time required for the oscillation to settle after VDD reaches Min.
of the oscillation voltage range.
Caution When the subsystem clock oscillator is used, conform to the following guidelines when wiring
at the portions of surrounded by dotted lines in the figures above to eliminate the influence of
the wiring capacity.
• The wiring must be as short as possible.
• Other signal lines must not run in these areas.
• Any line carrying a high fluctuating current must be kept away as far as possible.
• The grounding point of the capacitor of the oscillator must have the same potential as that of
VDD. It must not be grounded to ground patterns carrying a large current.
• No signal must be taken from the oscillator.
When the subsystem clock is used, pay special attention to its wiring; the subsystem clock
oscillator has low amplification to minimize current consumption and is more likely to malfunc-
tion due to noise than the main system clock oscillator.
CAPACITANCE (Ta = 25 °C, VDD = 0 V)
Parameter
Input capacitance
Output capacitance
I/O capacitance
Symbol
CI
CO
CIO
Conditions
f = 1 MHz
0 V for pins other than pins to be
measured
Min.
Typ.
Max.
Unit
15
pF
15
pF
15
pF
41
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