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UPD750108CU データシートの表示(PDF) - NEC => Renesas Technology

部品番号
コンポーネント説明
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UPD750108CU
NEC
NEC => Renesas Technology NEC
UPD750108CU Datasheet PDF : 80 Pages
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Figure 6-6. Timer/Event Counter Block Diagram
SET1Note
8
TM06 TM05 TM04 TM03 TM02
Internal bus
8
TM0
8
TMOD0
Modulo register (8)
TOE0
T0 enable
flag
Port input
buffer
Input buffer
TI0/P13
From the clock
generator
fCC/24
fCC/26
fCC/28
fCC/210
MPX
CP
Timer operation start signal
8
Comparator (8)
Match TOUT
flip-flop
TOUT0
8
T0
Reset
Count register (8)
Clear signal
PORT2.0 Bit 2 of PMGB
P20
output
latch
signal
Port 2
input/
output
mode
To serial
interface
Output
buffer
PTO0/P20
INTT0
IRQT0
set signal
RESET
IRQT0 clear
signal
Note Instruction execution

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